CIR Combine: Cross-Boundary Analysis for Heterogeneous CUDA/HIP Compilation

Today, LLVM's offload compilation keeps host and device code strictly separate; they only reunite late in the pipeline when the device binary is embedded into the host object. By that point, cross-boundary reasoning is largely out of reach. CIR Combine introduces a merge-optimize-split stage into ClangIR's compilation pipeline. After both host and device modules are compiled to CIR, a new driver action merges them into a single heterogeneous translation unit, an offload container holding both modules as nested regions. With both sides visible simultaneously, cross-boundary analysis passes can propagate constants from host launch sites into device kernels, eliminate kernels that are never launched, and infer launch dimensionalities that inform device-side optimization. A subsequent split action extracts the transformed modules and feeds them back into their respective backend pipelines. Deliverables: - Working merge/split skeleton integrated into the new offload driver - Cross-boundary constant propagation pass validated on real CUDA/HIP kernels - Compile-time overhead measurements, and the infrastructure that makes further host-device optimizations possible in the future.